SOURCE: Lattice Semiconductor Corporation

Lattice Semiconductor Corporation

January 04, 2010 03:01 ET

LatticeECP3 FPGA Family Is Product of the Year

Low Power, High Value FPGA Captures Coveted Award From Electronic Products Magazine

HILLSBORO, OR--(Marketwire - January 4, 2010) - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that its LatticeECP3™ FPGA family has been named Digital IC "Product of the Year" by Electronic Products magazine.

Product of the Year recognition from Electronic Products is among the most prestigious and fiercely contested awards in the electronics industry. The award is held in such high regard due in part to the longevity of the competition (annually for the past 34 years), and its selectivity: the editors of Electronic Products evaluated thousands of products launched in 2009 and judged them against three criteria:

--  A significant advancement in a technology or its application
--  Innovative design
--  A substantial achievement in price/performance
    

"We concluded that the ECP3 FPGA family brings compelling features to the mid-range FPGA table, including 16 channels of 3.2 Gbit/s SERDES with 10GbE XAUI jitter compliance that take just 110 mw each," said Jim Harrison, West Coast editor for Electronic Products. "The DDR3 interfaces, up to 6.8 Mbits of memory and 500 MHz DSP slices, plus lower active and standby power, made the ECP3 FPGA the clear choice for us. These are devices that many engineers will be eager to put to good use in their designs."

The 2009 Product of the Year Awards were announced in the January 2010 issue of Electronic Products with a cover feature and a brief description of each product chosen. Additionally, the winning products appear on the Electronic Products website, http://www2.electronicproducts.com/productyear.aspx.

"Our ECP3 FPGA family has received several awards, and none are more appreciated than this Product of the Year honor from Electronic Products, regarded by many as the gold standard for industry recognition," said Sean Riley, Lattice Corporate Vice President and General Manager of High Density Solutions. "We went in a different direction when we defined a new class of mid-range FPGA, and both industry accolades and worldwide customer acceptance of our ECP3 family confirm the direction we took was the right one. Even though other FPGA vendors now are finally offering mid-range devices, this award confirms that the ECP3 continues to excel in terms of its best-in-class features, low power consumption and low cost. Designers are leveraging these unprecedented mid-range benefits in wireless, wireline access and image processing applications."

About the LatticeECP3 FPGA Family

The low power, high value LatticeECP3 FPGA family is comprised of five devices that offer standards-compliant multi-protocol 3G SERDES, DDR1/2/3 memory interfaces for low cost FPGAs and high performance, cascadable DSP slices that are ideal for high performance RF, baseband and image signal processing. Toggling at 1Gbps, the LatticeECP3 FPGAs also feature the fastest LVDS I/O available in a mid-range FPGA family, as well as embedded memory of up to 6.8 Mbits. Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O. The LatticeECP3 FPGA family's high performance features include:

--  3.2Gbps SERDES with 10GbE XAUI jitter compliance and the ability to
    mix and match multiple protocols on each SERDES quad.  This includes PCI
    Express, CPRI, OBSAI, XAUI, Serial RapidIO and SGMII/Gigabit Ethernet.
--  The SERDES/PCS blocks have been designed specifically to enable the
    design of the low latency variation CPRI links that are found in wireless
    basestations with Remote Radio Head connectivity.
--  Compliance to the SMPTE Serial Digital Interface standard, with the
    unprecedented ability to support 3G, HD and SD video broadcast signals
    independently on each SERDES channel.  The triple rate support is performed
    without any oversampling technique, consuming the least possible amount of
    power.
--  DSP blocks allowing up to 36x36 Multiply and Accumulate functions
    running at > 400MHz.  The DSP slices also feature innovative cascadability
    for implementing wide ALU and adder tree functions without the performance
    bottlenecks of FPGA logic.
--  1Gbps LVDS I/O, with Input Delay blocks, allows interfacing to high
    performance ADCs and DACs
    
.

With these features, the LatticeECP3 FPGA family is ideally suited for deployment in high volume cost- and power-sensitive wireless infrastructure and wireline access equipment, as well as video and imaging applications. For more information about the LatticeECP3 FPGA family, visit http://www.latticesemi.com/products/fpga/ecp3

About Lattice Semiconductor

Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com

Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeECP3 and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

Contact Information

  • EDITORIAL/READER CONTACT:
    Brian Kiernan
    Corporate Communications Manager
    Lattice Semiconductor Corporation
    503-268-8739 voice
    503-268-8193 fax
    brian.kiernan@latticesemi.com