November 24, 2008 19:00 ET

Reminder - Tanner EDA to Present on Layout Design and Verification for Analog and Mixed-Signal and MEMS Design at MAP2008

November 26 Through 28, Fukuoka, Japan

FUKUOKA, JAPAN and MONROVIA, CA--(Marketwire - November 24, 2008) -


Tanner EDA, the world leader in PC-based analog and mixed-signal (AMS) circuit design tools, will attend the 8th International Workshop on Microelectronics Assembling and Packaging (MAP2008). Yoshiko Shimogaki of Tanner Research Japan K.K. is presenting on the topic of layout design and verification during the MAP2008 session on Electronic Design Automation (EDA) tools for Analog/Mixed-Signal circuit and MEMS (Microelectromechanical Systems) design.


Tanner EDA Presentation: 16:05 ~ 16:25, Thursday, November 27, 2008
MAP2008 Workshop: November 26-28, 2008

Where: JAL Resort Seahawk Hotel Fukuoka, Fukuoka, Japan


To arrange an appointment with Tanner EDA at MAP2008, please email

For more information about Tanner EDA, please visit or

For information about MAP2008, please visit

About Tanner EDA

Tanner EDA is a leading provider of PC-based electronic design automation (EDA) software solutions for the design, layout and verification of analog and mixed-signal ICs and MEMS. For more information on Tanner EDA products, visit

All trademarks and tradenames are the property of their respective owners.

Contact Information