SOURCE: STATS ChipPAC

January 08, 2008 16:00 ET

STATS ChipPAC Reaches Package-in-Package Milestone With Over 25 Million Units Shipped

Unparalleled Integration Flexibility and Functional Density in a Smaller Form Factor Ideal for Mobile Applications

UNITED STATES--(Marketwire - January 8, 2008) - SINGAPORE -- 1/9/2008 -- STATS ChipPAC Ltd. ("STATS ChipPAC" or the "Company") (SGX-ST: STATSChP) (PINKSHEETS: STTSY), a leading independent semiconductor test and advanced packaging service provider, today announced it has achieved a milestone of over 25 million units manufactured for its innovative Package-in-Package (PiP) solutions. PiP is a three dimensional (3D) package technology in which separately assembled and tested packages and bare chips are stacked together in a single chip scale package for exceptional integration flexibility and functional density in a smaller form factor.

PiP technology provides design flexibility in integrating several logic and/or analog devices with memory devices in a single package. Memory devices such as Flash (NOR/NAND), SDRAM and SDR/DDR are combined in an Internal Stacking Module (ISM) and are fully tested before being mounted and interconnected to the base package. Each PiP solution has a separately assembled and tested ISM package stacked within. The final form factor of the PiP is equivalent to a conventional Fine Pitch Ball Grid Array (FBGA) package with a low profile height of 1.2mm to 1.4mm.

"We introduced Package-in-Package technology in 2004 as a new approach to integrating logic, analog and memory devices into a single solution. As demand for high performance, feature rich mobile phones and other handheld applications has grown, there has been a significant increase in customer adoption of PiP technology and successful ramp to high volume production," said Dr. Han Byung Joon, Executive Vice President and Chief Technology Officer, STATS ChipPAC.

PiP is ideal for mobile phones and other handheld applications because it provides greater functional integration in a smaller form factor with an overall reduction in total cost as compared to other 3D package stacking solutions. PiP technology utilizes standard packaging materials, manufacturing equipment and assembly processes that meets or exceeds all JEDEC reliability requirements. The stacking of pre-tested packages ensures design flexibility, higher final test yields and competitive sourcing for a shorter time-to-market and overall lower cost.

With PiP technology, customers have the flexibility of choosing either wire bond or flip chip interconnection as well as the option to judiciously combine both forms of interconnect within the same package for the most optimal solution. In June 2007, STATS ChipPAC announced an innovative Flip Chip PiP (fcPiP) solution that integrates the baseband, memory and analog functions of a mobile communication device into a single package. Flip Chip PiP combines flip chip and wire bond interconnection in the same package to deliver increased speed, performance and miniaturization.

"PiP is a flexible technology for both package level and system level designs which addresses the growing need to have 3D System-in-Package solutions that integrate known good or tested good logic, analog, RF and memory devices with other active or passive elements into a smaller form factor," said Dr. Han.

About STATS ChipPAC Ltd.

STATS ChipPAC Ltd. ("STATS ChipPAC" or the "Company") (SGX-ST: STATSChP) is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the Singapore Exchange Securities Trading Limited (SGX-ST). Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.

Certain statements in this release, including statements regarding expected future financial results and industry growth, are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ from our expectations include, but are not limited to, general business and economic conditions and the state of the semiconductor industry; level of competition; demand for end-use applications products such as communications equipment and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; reliance on a small group of principal customers; continued success in technological innovations; availability of financing; pricing pressures including declines in average selling prices; the ability to meet the applicable requirements for the termination of registration under the U.S. Securities Exchange Act of 1934, as amended; ability to meet specific conditions imposed for the continued listing or delisting of the Company's securities on the SGX-ST; our substantial level of indebtedness; potential impairment charges; adverse tax and other financial consequences if the South Korean taxing authorities do not agree with our interpretation of the applicable tax laws; ability to develop and protect our intellectual property; rescheduling or canceling of customer orders; changes in products mix; intellectual property rights disputes and litigation; capacity utilization; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; changes in customer order patterns; shortages in supply of key components; disruption of our operations; loss of key management or other personnel; defects or malfunctions in our testing equipment or packages; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; significant ownership by Temasek Holdings that may result in conflicting interests with Temasek Holdings and our affiliates; unsuccessful acquisitions and investments in other companies and businesses; our ability to continue to successfully integrate the operations of the former separate STATS and ChipPAC companies and their employees; labor union problems in South Korea; uncertainties of conducting business in China; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; and other risks described from time to time in the Company's SEC filings, including its annual report on Form 20-F dated March 12, 2007. We undertake no obligation to publicly update or revise any forward-looking statements, whether as a result of new information, future events or otherwise.

Contact Information

  • Investor Relations Contact:
    Tham Kah Locke
    Vice President of Corporate Finance
    Tel: (65) 6824 7788
    Fax: (65) 6720 7826
    email: Email Contact

    Media Contact:
    Lisa Lavin
    Deputy Director of Corporate Communications
    Tel: (208) 939 3104
    Fax: (208) 939 4817
    email: Email Contact