Contact Information: Contact Information 3Plus1 Technology, Inc. 18809 Cox Ave. Saratoga, CA 95070 Tel: 408-370-3104 www.3p1.com
Academic and Industry Luminary Dr. Sangiovanni-Vincentelli Joins 3Plus1 Technology, Inc. as Advisor
Sangiovanni-Vincentelli Joins an Exclusive Group of Technology and Business Contemporaries Pioneering Ultra-Low-Power Heterogeneous Multiprocessor Architecture; Technology Targets Concurrent Communications and Multimedia Applications in Mobile Systems
| Source: 3Plus1 Technology, Inc.
SARATOGA, CA -- (MARKET WIRE) -- January 22, 2007 -- 3Plus1 Technology, Inc. today announced the
addition of Dr. Alberto Sangiovanni-Vincentelli as an Advisor and member of
their Technical Advisory Board. Dr. Sangiovanni-Vincentelli has joined an
elite group of technologists and business leaders helping 3Plus1 to develop
an ultra-low-power solution for next-generation mobile handsets for which
the company has announced an advanced multiprocessor architecture conceived
from the ground up.
Dr. Sangiovanni-Vincentelli holds the Edgar L. and Harold H. Buttner Chair
of Electrical Engineering and Computer Sciences at the University of
California at Berkeley and is Vice-Chair for Industrial Relations.
He was a co-founder of industry leaders, Cadence Design Systems and
Synopsys. In addition, he is the Chief Technology Advisor and a board
member at Cadence and also sits on the board of Softface Inc., Sonics Inc.,
and Accent. He is a member of the HP Strategic Technology Advisory Board.
Dr. Sangiovanni-Vincentelli has consulted with IBM, Intel, AT&T, GE,
Harris, Nynex, and Hewlett-Packard, and has held the title of Chief
Technology Advisor to Fujitsu, Sony, and Hitachi, as well as ST
Microelectronics, Alcatel, Daimler-Chrysler, BMW, and Bull.
An IEEE Fellow since 1982 and member of the National Academy of
Engineering, he has received the CASS Golden Jubilee Medal, the Aristotle
Award of the Semiconductor Research Corporation, the Guillemin-Cauer and
Darlington Awards from the IEEE, and the prestigious Kaufman Award of the
EDA Consortium.
"I am very excited to join this well established and talented team of
advisors," commented Dr. Sangiovanni-Vincentelli, "and I look forward to
helping them bring ultra-low-power processor-based platforms and system
solutions to fruition."
Dr. Sangiovanni-Vincentelli joins an elite group of active advisors to
3Plus1, including Prof. Jan Rabaey, University of California at Berkeley;
Prof. Krste Asanovic, MIT; Prof. John Warzynek, University of California at
Berkeley; Dr. Drew Wingard, CTO, Sonics Inc.; Prof. Wen-Mei Hwu, Univ. of
Illinois; Prof. Hamid Jafarkani, University of California at Irvine; Prof.
Tom Conte, North Carolina State University; Dr. Handel Jones, President,
IBS; and Grant Pierce, President, Sonics Inc.
"We are delighted and honored that such an experienced and talented member
of the technology community has joined us," said Allan Cox, President and
CEO of 3Plus1. "Alberto brings unique qualities to the Advisory Board that
will help accelerate our product introductions planned for this year."
About CoolProcessor
The Company's CoolProcessor technology has been developed in record time,
based on an internally developed and automated methodology, capable of
generating RTL, simulation, analysis, and verification tools from an
internal design language for CoolProcessor Architecture.
The CoolProcessor family of cores is scaleable and upwardly code compatible
with a single programming model. Development of software applications
follows a standard DSP tool flow and the company is currently delivering
its initial applications-development software and FPGA Emulator Boards to
US and International customers.
About 3Plus1 Technology
Founded in 2003, 3Plus1 Technology has created a design methodology and
architectural approach specifically designed for low-power, concurrent
execution of specific applications, including MPEG 2/4, H.263/4, JPEG/2000,
802.11 a/b/g/n, 802.16, Bluetooth, UWB, GSM/GPRS/EDGE, CDMA 2000/WCDMA,
MP3, AAC, DVB-H and GPS, in a modular, scalable, heterogeneous
multiprocessor architecture. The technology enables software implementation
of combinations of these multi-mode scenarios and use models that can be
accomplished in a sub-100mw processor core when implemented in a standard
90nm low-power CMOS process.
Financed by its founders since its inception, with additional income from
sales of its first tools and services, the company is addressing the needs
of the 800-million-plus mobile media player, handset, camera and UMPC
markets. 3Plus1 has assembled a group of world-class technologists
addressing the problems of real-time voice, video and data processing -- at
ultra-low-power levels and minimum silicon die size -- from the fundamental
software and hardware architectural perspectives.