SOURCE: CADENCE DESIGN SYSTEMS, INC.

February 25, 2009 08:00 ET

AMD Selects Cadence Incisive Palladium Series to Verify Complex Graphics Design

Cadence Accelerator/Emulator Addresses System-Level Verification Complexity and Speeds Delivery of First Silicon Success for ATI Radeon™ HD 4800 Series First Silicon

SAN JOSE, CA--(Marketwire - February 25, 2009) - Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, today announced that AMD (NYSE: AMD) successfully used the Cadence® Incisive® Palladium® II Accelerator/Emulator to deliver the first working silicon for its complex ATI Radeon™ HD 4800 series graphics design produced in 2008. The ATI Radeon HD 4800 series includes over 800 million transistors and is the most complex AMD graphics design shipped to date.

The Palladium system was thoroughly evaluated by AMD and found to be the most appropriate solution versus alternatives on the market. The system was critical for the overall success of the project and played a key roll in verifying overall system operation, including both hardware and software. The ease of bring-up and integrated software debugging capabilities helped the team at AMD to quickly ramp up its system-level verification environment and to begin system validation much earlier in the ASIC design cycle, saving significant time in the overall schedule and ensuring better product quality.

"Cadence's Palladium II system and its integrated verification solution provide the most efficient way to test complex interactive ASIC designs," said Jean Boufarhat, vice president of Design Engineering at AMD. "System-level testing had become a critical aspect of our overall design methodology and the Palladium emulation system offers first-rate value for our development teams."

The Palladium series provides the highest throughput for validation of complex hardware, software and full systems in the wireless, graphics, networking and consumer markets. The series delivers superior debug, system-wide management, and advanced verification automation features such as assertion- and transaction-based acceleration, and can bring-up a new design in emulation in less than a week.

"We are delighted to be working closely with AMD as they continue to push the envelope delivering complex graphic designs for this fast moving market," said Tom Cooley, senior vice president of Worldwide Field Operations. "The Palladium series continues to lead the market in the area of verification of full SoC designs with embedded processors, saving months in the overall schedule and reducing the risk of finding costly post-silicon bugs."

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Cadence, Palladium, Incisive and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the U.S. and other countries. All other marks are properties of their respective holders.

Contact Information

  • For more information, please contact:
    Dean Solov
    Cadence Design Systems, Inc.
    408-428-4404
    dsolov@cadence.com