April 17, 2007 17:14 ET

ASE Chooses Cadence for SiP Design Worldwide

Leading IC Service Company Selects Cadence SiP Design Technology for High-Performance Package Solutions

SAN JOSE, CA and HSINCHU, TAIWAN -- (MARKET WIRE) -- April 17, 2007 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, and Advanced Semiconductor Engineering, Incorporated (ASE, TAIEX: 2311) (NYSE: ASX), the world's largest semiconductor packaging and test company, today announced that ASE has selected Cadence® System-in-Package (SiP) design technology to provide high-performance package design services to its customers throughout the world.

"With Cadence SiP design technology, we have an integrated co-design flow within the supply chain for optimizing SiP design and system integration, from die to package to final product," said Dr. C. P. Hung, senior director of corporate design, research and development, ASE Group. "By working with Cadence, we are better able to serve our customers' needs in this exciting and rapidly growing packaging segment."

The latest Cadence SiP design technologies provide flows for digital SiP module co-design integrated with the Cadence Encounter® digital IC design platform, and flows for RF/AMS SiP module co-design integrated with the Cadence Virtuoso® custom design platform. These flows integrate IC package and chip design into a concurrent streamlined process. This allows both ASE and its customers to shorten design cycle time and optimize total packaging solutions for yield and performance, while minimizing design risk.

"Collaborating with ASE has enabled Cadence to develop features uniquely designed for assembly and test foundries," said Charlie Giorgetti, corporate vice president of product marketing at Cadence. "This innovative partnership enables Cadence to offer SiP co-design solutions that reduce design cycle time and meet increasingly demanding performance specifications."

About ASE Group

The ASE Group is the world's largest provider of independent semiconductor manufacturing services in assembly and test. As a global leader geared towards meeting the industry's increasing need for faster, smaller and higher performance chips, the Group develops and offers a wide portfolio of technology and solutions including IC test program design, front-end engineering test, wafer probe, wafer bump, substrate design and supply, wafer level package, flip chip, system-in-package, final test, and electronic manufacturing services through Universal Scientific Industrial Co Ltd, a member of the ASE Group. The Group generated sales revenues of $3.2 billion in 2006 and employs over 28,000 people worldwide. For more information about the ASE Group, visit

About Cadence

Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2006 revenues of approximately $1.5 billion, and has approximately 5,200 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at

Cadence, Encounter and Virtuoso are registered trademark, and the Cadence logo is a trademark, of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

Contact Information

  • For more information, please contact:
    Maria Canul
    Cadence Design Systems, Inc.
    Direct: 408.944.7226