What Sidense at Design Automation Conference Lunch Panel Solving the IP Puzzle for Consumer SoC Memory Requirements Moderated by Ron Wilson, Executive Editor of EDN Wednesday, Noon to 1:30PM in Room 29CD IP talks! Presentation on Sidense's one-time programmable memory IP cores Monday, 4PM at the Chip Estimate Booth #2464 Where Design Automation Conference (DAC), San Diego, CA When Meetings - Monday through Wednesday June 4-6, 2007 Lunch panel - Wednesday, June 6 at Noon IP talks! Presentation - Monday, June 4 at 4PM Who Xerxes Wania, Sidense President and CEOAbout Sidense Sidense provides secure, dense and reliable non-volatile one-time programmable (OTP) memory IP cores for use in standard-logic CMOS processes, with no additional masks or process steps required. The memory is portable across several different technology nodes and foundries, and can be programmed in the field or during wafer or production testing. The company has offices in Mississauga and Ottawa, Canada and sales offices in San Francisco, CA and Tokyo, Japan. For more information, visit www.sidense.com.
Contact Information: For more information or to schedule a meeting with Sidense please contact: Jim Lipman Cain Communications Email Contact 925-606-1370