SOURCE: Duolog Technologies

June 24, 2008 11:03 ET

Duolog Technologies Wins Three "Best of DAC" Awards

Ireland-Based Chip Design Tools Company Premiers New Spinner IC Integration and Bitwise Register Management Software at DAC

DUBLIN, IRELAND--(Marketwire - June 24, 2008) - Duolog Technologies, the Collaborative Design Automation™ company, premiered its new Spinner I/O fabric generation tool at last week's 45th annual DAC design automation conference in Anaheim, California, winning an unprecedented three Best of DAC Awards.

DAC is the premier event for the design of electronic circuits and systems and for EDA and silicon solutions attracting 1,500 organizations annually. Duolog was the overall winner of the "Most Interesting First Time Exhibitor" Award and won Trendsetter Awards for Best New Product for its Spinner I/O fabric generation tool and Best Demonstration on Exhibit Floor. Duolog introduced Spinner™ at DAC to enable automated, bug-free I/O fabric synthesis of complex SoCs.

"We are extremely pleased with the excitement and interest garnered by our premiere at DAC," said Ray Bulger, co-founder and CEO, Duolog Technologies. "Our new Spinner and Bitwise software tools for designing complex ICs were very well received, and we are proud to have been recognized with three Best of DAC awards for best first time exhibitor and recognition as a Trendsetter for our Spinner debut and product demonstration."

Duolog's award-winning Spinner complex-chip integration software auto-generates and validates the RTL for the complete I/O layer of an IC from a single-source specification. Using Spinner's Perfect By Construction™ methodology, designers of today's complex SoC, ASIC and FPGA semiconductors and related IP can eliminate I/O bugs and greatly simplify their integration efforts -- with up to 3x fewer resources, 5x schedule reductions and radically improved quality through sign-off level collaboration on incremental changes. Duolog's tools automate the chip integration process for its clients thus eliminating bugs, shrinking design cycles and drastically reducing the risk of costly delays and re-spins.

Duolog Bitwise provides a fully automated solution that enables a single-source definition of the HW/SW interface of a full system, allowing earlier software integration, higher productivity and fewer bugs. Bitwise promotes massive reuse of IP or sub-system register data across multiple views including HW/SW design, verification, integration and documentation.

About Duolog Technologies Ltd.

Duolog Technologies, the Collaborative Design Automation™ company, is an award-winning developer of groundbreaking EDA tools that enable the flawless and rapid integration of today's increasingly complex SoC, ASIC and FPGA designs. Duolog's Socrates Chip Integration Platform enables IC designs that are Perfect By Construction™. The world's leading IP and IC/SoC development companies rely on Duolog tools to automate their chip integration processes -- eliminating bugs, shrinking design cycles and drastically reducing the risk of costly delays and re-spins. Duolog Technologies employs 80 people at its headquarters at NovaUCD, the Innovation and Technology Transfer Centre at UCD, its design centres in Galway and Budapest, Hungary and US and international operations. For more information, visit

Spinner, Bitwise, Collaborative Design Automation and Perfect by Construction are trademarks of Duolog Technologies Ltd.

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