SOURCE: GateRocket


February 22, 2011 12:34 ET

GateRocket FPGA Verification Solution Named Finalist for Prestigious EDN Innovation Award in EDA/ASIC Category

BEDFORD, MA--(Marketwire - February 22, 2011) - GateRocket, Inc., the leading supplier of verification and debug tools for advanced FPGAs, announced today it has been named as a finalist in EDN's 21st annual Innovation Awards ( The company's Device Native®-based FPGA verification and debug solution, enhanced in 2010 with a novel productivity improvement called SoftPatch, was recognized in the EDA Tools and ASIC Technologies category. The nomination follows the GateRocket product being named a winner of a 2011 Design Vision Award last month.

The winners of the 2011 Innovation Awards will be announced at the annual gala dinner, May 2, 2011, in San Jose, CA. GateRocket is joined by other category finalists from Apache Design Solutions, GlobalFoundries and Mentor Graphics (NASDAQ: MENT).

Finalists were selected by a team of editorial experts from EDN and its parent company UBM, who considered hundreds of applications from suppliers of new products over the past year. Next, an on-line voting process is used to select a winner from each category, with voting running from now until March 31. EDN uses a combination of these audience votes and balloting by EDN's editorial staff to determine the ultimate winners.

"Being named as a finalist alongside such great companies is a flattering and prestigious honor. The fact that a company focused exclusively on FPGA design challenges is represented speaks to the tremendous demand in the industry for more sophisticated design tools to keep pace with FPGA technology. Leading-edge design tools are no longer just the domain of the ASIC world: the size and complexity of modern FPGAs dictate very advanced and specialized tools for programmable logic design as well, and we are pleased to represent this important emerging area of electronic design. A vote for GateRocket is really a vote for progress in FPGA tools in general," said Dave Orecchio, president and CEO of GateRocket.

SoftPatch, called "the killer feature" by FPGA Journal, enhances GateRocket's RocketVision® FPGA debug platform. It enables designers to patch their FPGA hardware with an edited RTL software block and see the effect on the chip's operation without re-building the FPGA. The capability allows the user to select any number of individual design blocks to have the flexibility to run in their simulator or execute in the FPGA that is inside GateRocket's RocketDrive® hardware verification system. The user can then decide at simulation time which blocks execute inside the FPGA or in the simulator. This powerful capability enables them to select a block, instruct it to run in the simulator and then make changes to the RTL of that block and simulate it in software while the rest of the design executes in the native FPGA hardware in the RocketDrive. The user can repeat that sequence for as many blocks as they choose, again at runtime without rebuilding the FPGA device.

The benefit is straightforward: finding and fixing bugs faster, and avoiding unnecessary re-runs of time-consuming synthesis-to-place-and-route iterations. In customer engagements, is has proven to reduce overall design bring-up time by up to 50% or more compared to traditional approaches. It's not uncommon for large FPGAs design projects to have 18 hour synthesis-place-route times and anywhere between 100 to 200 iterations for a given project. Taking the average number of iterations, this means design teams are spending 2,700 hours building the FPGA, or 112, 24 hour days or 22.5 weeks. By cutting this time in half they could save 11.25 weeks or more of project time.

About EDN
EDN, published by UBM Electronics, serves the vital information needs of design engineers and engineering managers worldwide. delivers a three-dimensional view of the electronic industry via news coverage, strategic business information, and in-depth technical content. For more information go to

Over its lifetime of more than 50 years, EDN has witnessed many distinguished achievements. In 1990, the publication embarked on a special mission to honor the most innovative technological advancements -- and the designers who invent them. The EDN Innovation Awards program is now in its 21st year and proudly continues its tradition of recognizing rich talent in our industry in several categories.

About GateRocket

GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices from Xilinx (NASDAQ: XLNX) and Altera (NASDAQ: ALTR). The company's award-wining RocketVision® software debug tool and RocketDrive® hardware verification system enable users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at and sign up for a free webinar.

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