SOURCE: GateRocket

GateRocket

February 15, 2011 08:01 ET

GateRocket Highlights Optimal FPGA Design/Debug Solution at DVCon Booth #802 -- CTO Speaks on "Pragmatic Verification"

BEDFORD, MA--(Marketwire - February 15, 2011) - GateRocket® Inc. will feature its solutions for reducing FPGA verification and debug times at this month's DVCon (Feb. 28 - March 3), and CTO Chris Schalick will give a talk on verification challenges for SERDES-based FPGAs.

WHO: GateRocket, supplier of advanced FPGA design and debug solutions for Xilinx and Altera programmable devices.

WHAT: GateRocket brings its Device Native® verification approach to DVCon which extends the existing simulation environment in a way that enables engineers to detect bugs up-front in the design process that would otherwise slip through to system integration. The company's RocketDrive® is a hardware-based solution that significantly accelerates simulation and debug of large FPGAs; it bridges the gap between the RTL and the FPGA, enabling silicon-accurate simulation because it integrates the target FPGA device into the simulator.

WHEN/WHERE: 
GateRocket Booth #802, DVCon, Feb. 28 - March 3, DoubleTree Hotel, San Jose, Calif.
DVCon Session 6: "Pragmatic Approaches to Verification" from 11am - 12:30pm, Tuesday, March 1, Donner Ballroom. Features presentations from GateRocket, Intel and AMD. GateRocket CTO and Vice President of Engineering, Chris Schalick, will present "Addressing the Verification Challenge of SERDES-based FPGAs: The Performance/Accuracy/Efficiency Trade-off."

REGISTRATION & INFORMATION HYPERLINK:
DVCon

WHY: A recent FPGA Journal survey indicated that the process for identifying and fixing FPGAs by looping from the lab, where a bug is identified, back through simulation, synthesis, and place and route adds between 92 and 148 days to the FPGA design process. GateRocket has shown that its solutions can reduce this process by 55% or more by allowing the same bugs to be found and fixed during the simulation phase. According to FPGA Journal editor Kevin Morris: "By allowing the simulator to perform like the development board, many of us would be inclined to do more of our debug there, saving us some big time in the lab later on."

About GateRocket:  GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

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