SOURCE: GateRocket


May 25, 2011 08:00 ET

GateRocket's Award-Winning FPGA Debug and Verification Solutions on Display at 48th Annual DAC

BEDFORD, MA--(Marketwire - May 25, 2011) - With many industry observers predicting that FPGA design challenges will be one of the most discussed topics at the largest annual gathering of the chip design industry, GateRocket, Inc., will have the latest versions of its innovative FPGA Device Native® verification solutions on display at the 48th Design Automation Conference, June 6-9 in San Diego, California. GateRocket's products include the RocketVision® debugging system, which was named a Design Vision Product of the Year earlier this year, as well as a finalist for the EDN Innovation of the Year Award. Combined with its companion product, the RocketDrive® verification acceleration device, the GateRocket solution delivers unmatched efficiency and performance for verifying the largest and most complex FPGA designs.

GateRocket will be in Booth #3126 at the San Diego Convention Center. To schedule a demo, contact GateRocket by email at:

"The issues facing FPGA designers continue to grow in scale as the devices themselves increase in complexity and size. Over the past year, as 45/40nm FPGAs have moved into the mainstream, we have seen more designers hitting the verification wall because of issues such as IP integration, difficult-to-manage design flows through synthesis and place-and-route, and just the sheer size of the devices they are working on. Traditional tools and methodologies have reached a breaking point, and the interest level in innovative approaches such as our Device Native method is at an all-time high," Dave Orecchio, president and CEO of GateRocket.

The GateRocket solution has been proven to reduce the verification bottleneck of complex FPGAs by up to 50% or more through an approach that allows designers to bring the accuracy and speed of their FPGA device directly into their native software simulation environment. The result is extremely fast verification throughput, and a highly efficient method to track down and correct design errors. The GateRocket solution has been used effectively for ASIC prototyping with FPGAs as well as in the verification of production programmable logic devices. It has been utilized for specific FPGA challenges in such areas a mil-aero design (thanks to its support of the DO-254 mandate), in the growing area of SERDES design (a demo showing a XAUI core and SERDES elements will be shown at DAC), and DSP implementations in FPGAs (as a result of its integration with tools from MathWorks).

Of particular interest at DAC will be the latest version of the company's SoftPatch feature for its RocketVision debug platform. The feature enables designers to patch their FPGA hardware with an edited RTL software block and see the effect on the chip's operation without re-building the FPGA. The capability allows the user to select any number of individual design blocks to have the flexibility to run in their simulator or execute in the FPGA that is inside GateRocket's RocketDrive hardware verification system. The user can then decide at simulation time which blocks execute inside the FPGA or in the simulator. This powerful capability enables them to select a block, instruct it to run in the simulator and then make changes to the RTL of that block and simulate it in software while the rest of the design executes in the native FPGA hardware in the RocketDrive. The user can repeat that sequence for as many blocks as they choose, again at runtime without rebuilding the FPGA device.

About GateRocket

GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision® software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at and sign up for a free webinar.

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