SOURCE: Inovys Corporation

July 11, 2007 13:47 ET

Inovys to Showcase Award-Winning Yield Tools at SEMICON West 2007

PLEASANTON, CA--(Marketwire - July 11, 2007) - Inovys Corporation, a leading provider of yield, failure analysis and test solutions for the semiconductor industry, announced today that it will spotlight its award-winning yield analysis tools at SEMICON West 2007 at Moscone Center in San Francisco, CA, July 17-19. YieldVision, a unique integrated suite of tools that enables real-time statistical analysis of electrical failures on product die, has been awarded the 2007 Technology Innovation Showcase Award by SEMI. Inovys was selected by a jury of industry experts based on several criteria including technical merit and the potential impact the innovation will have on the industry. As an award winner, Inovys will deliver an exclusive presentation at SEMICON West on the Test, Assembly and Packaging TechXPOT stage on July 17 at 4:40PM.

"We are extremely pleased to receive this prestigious award from SEMI for our newly introduced yield tools," said Paul Sakamoto, CEO, Inovys Corporation. "This award reinforces the commitment we have made to consistently provide our more than 50 customers with innovative software analysis solutions."

"Receiving such high accolades for our first yield solution is truly an honor," said Dave Bakker, executive chairman, Inovys Corporation. "Even though this is a new toolset, our customers have already realized the benefits it brings in accelerating their new product introductions."

You can find Inovys in the West Hall of Moscone Center, on Level Two in booth T-12. To schedule your demo, please send your request to

About Inovys Corporation

Inovys provides innovative yield enhancement, failure analysis, and design debug solutions for the semiconductor industry. Inovys customers include the industry leading Integrated Device Manufacturers (IDMs), Fabless companies, Foundry and Test subcontractors. These companies use Inovys solutions to accelerate their new product introductions and optimize yield ramps of their advanced system on chip (SOC) devices. The revolutionary Inovys Design For Test (DFT) analysis toolset enables customers to reduce electrical failure resolution cycle times from weeks to hours. Learn more about Inovys at

Contact Information

  • Contact:
    Patrice Riley
    Inovys Corporation
    (925) 660-1752
    Email Contact