SOURCE: Jasper Design Automation

Jasper Design Automation

November 11, 2010 11:10 ET

Jasper CEO Kathryn Kranen Addresses Post-Silicon Validation Challenge at IP-SOC 2010, Dec. 1, Grenoble

MOUNTAIN VIEW, CA--(Marketwire - November 11, 2010) -

WHAT: Jasper Design Automation CEO Kathryn Kranen is an invited speaker at this year's IP-SOC 2010, describing best practices for post-silicon validation, debug and verification, and offering timely solutions for this increasingly urgent issue. Held annually in Grenoble, IP-SOC highlights IP-based SoC design issues with three days of seminars, panels and distinguished speakers. 2010 conference dates are Nov. 30 - Dec. 1. For more information: http://www.design-reuse.com/ipsoc2010/.

WHEN: Wednesday, Dec. 1, 10:30am-11:00am, Invited Talk, Kathryn Kranen

WHERE: Kilimandjaro Room, World Trade Center, Grenoble, France

WHO: Kathryn Kranen, President and CEO, Jasper Design Automation

About Jasper Design Automation
Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 150 successful chip deployments. Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Asia. Visit www.jasper-da.com to reduce risks; increase design, verification and reuse productivity; and accelerate time to market.

Jasper Design Automation and the Jasper Design Automation logo are trademarks or registered trademarks of Jasper Design Automation, Inc. All other trademarks mentioned are the property of their respective companies.

Contact Information

  • Contact:
    Jim Lochmiller
    lochpr
    For Jasper Design Automation
    (541) 292-0959
    Email Contact