SOURCE: Lattice Semiconductor Corporation

January 08, 2007 08:00 ET

Lattice and Aldec Sign Mixed-Language Simulator Agreement

Lattice Becomes the Only FPGA Company to Offer a Mixed-Language Simulator Based on Aldec's Active-HDL Designer Edition Tools

HILLSBORO, OR -- (MARKET WIRE) -- January 8, 2007 -- Lattice Semiconductor (NASDAQ: LSCC) and Aldec, Inc. today announced that Lattice will offer its customers a special edition of Aldec's Active-HDL Designer Edition tools for FPGA design. The Active-HDL Lattice Designer Edition Lite supports mixed VHDL and Verilog simulation for Lattice's leading FPGA devices, including the 90nm Extreme Performance™ LatticeSC™ family as well as the 90nm LatticeECP2M™ family, which is the industry's only low-cost FPGA family with unequaled on-chip memory capacity and 3.125 Gbps SERDES I/O.

"We are very pleased to offer Aldec's verification solutions directly to our customers," said Tim Schnettler, director of design tools marketing. "Through Active-HDL and its other products, Aldec has been providing productivity enhancing tools to support FPGA and system design for many years. This partnership will enable Aldec and Lattice to offer our mutual customers 'More of the Best' FPGA design solutions."

"Lattice has become 'The Third Force' in the FPGA industry. Now that Lattice has its own edition of Aldec's mixed-language simulator in its EDA product portfolio, we look forward to strengthening our position with Lattice's new FPGA families," said David Rinehart, vice president of marketing at Aldec. "Combining the power of Aldec's mixed-language simulator with Lattice's ispLEVER® software design tools will allow users of leading edge Lattice FPGA silicon to achieve their system design goals faster. By marketing Active-HDL Lattice Designer Edition Lite, Lattice will assume an even more prominent role within the FPGA design community."

About Active-HDL Lattice Designer Edition Lite

In addition to mixed VHDL and Verilog RTL and Timing Simulation, Active-HDL Lattice Designer Edition Lite also will include Aldec's HDL Text Editor, Language Assistant, State Machine Editor, Block Diagram Editor and other point tools in a single design workspace. Key debug capabilities such as Code Execution Tracing and Advanced Breakpoint Management also are included in the Lattice edition. For a complete list of capabilities, please visit the Lattice website at

Price and Availability

Active-HDL Lattice Designer Edition Lite is available from Lattice now. The list price of $1249 for an annual node-locked license makes the Active-HDL Lattice Designer Edition Lite the industry's superior mixed-language simulator value.

About Aldec

Aldec, Inc., a 22-year EDA tool provider, is committed to delivering high-performance, HDL-based design verification software for UNIX®, Linux® and Windows® platforms. Aldec is dedicated and responsive to serving its customers' needs. It is recognized that to be productive in today's market and to best serve customers in the future, new technologies and innovations that go beyond traditional methods of conducting business in the EDA industry must be pursued. Aldec is committed to customer service and is actively developing a company that will evolve along with its customers' designs. Additional information about Aldec is available at

About Lattice Semiconductor

Lattice Semiconductor Corporation provides the industry's broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products.

Lattice continues to deliver "More of the Best" to its customers with comprehensive solutions for system design, including an unequaled portfolio of high-performance, non-volatile and low-cost FPGAs.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets. For more information, visit

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our third party silicon suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), ispLEVER, Extreme Performance, LatticeSC, LatticeECP2M and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

Contact Information

    Brian Kiernan
    Corporate Communications Manager
    Lattice Semiconductor Corporation
    503-268-8739 voice
    503-268-8193 fax

    David Rinehart
    VP Marketing
    Aldec, Inc.
    (702) 990-4400 ext. 205

    Wendy Truax
    HighPointe Communications
    (503) 351-0103