SOURCE: Real Intent

semiconductor, EDA, electronic design automation, clock domain crossing, CDC, ASIC, FPGA, linting

December 01, 2010 14:32 ET

Media Advisory: Real Intent CTO Pranav Ashar Speaks About Optimizing Electronic Designs for Power and Performance at IEEE Workshop on Microprocessor Test and Verification

AUSTIN TX--(Marketwire - December 1, 2010) -

Pranav Ashar, CTO of Real Intent, Inc., will speak at the IEEE's 11th annual Workshop on Microprocessor Test and Verification (MTV). His talk is about Ensuring Functional Integrity under Aggressive Power and Performance Optimization and is part of an invited industry session on Formal Methods for Power and Performance.

3:30-4:45pm, Tuesday, December 14, 2010
Hyatt Regency Hotel, Austin, Texas, USA

Information and Registration
To register for MTV, please visit
To schedule a meeting with Real Intent, please email
For more information about Real Intent, please visit

About Real Intent's Software Products
Real Intent's automatic verification families include Ascent™ for early functional verification, Meridian™ for early Clock Domain Crossing (CDC) and Design for Test (DFT) verification, and PureTime™ for comprehensive constraints validation with glitch-aware exception verification.

About Real Intent
Real Intent is the innovator in automating the intelligence of formal techniques for design verification. This technology is used to solve critical problems encountered by design and verification teams worldwide. Real Intent's family of products dramatically improves the functional verification efficiency of leading edge ASIC and FPGA devices.
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Ascent, Meridian, and PureTime are trademarks of Real Intent, Inc.
All other trademarks and trade names are the property of their respective owners.

Contact Information

  • Press Contact:
    Georgia Marszalek
    ValleyPR LLC for Real Intent