SOURCE: Real Intent, Inc.

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October 15, 2013 08:00 ET

MEDIA ALERT: Real Intent to Present Keynote Address at FMCAD in Portland, Ore. on Oct. 23

SUNNYVALE, CA--(Marketwired - October 15, 2013) -

Who

Dr. Pranav Ashar, Chief Technology Officer at Real Intent, whose advanced verification solutions accelerate electronic design sign-off, will present one of two keynote addresses next week at FMCAD -- the Formal Methods in Computer-Aided Design conference.

What

"Static Verification Based Signoff – A Key Enabler for Managing Verification Complexity in the Modern SoC."

The 1½-hour presentation focuses on application-based verification, in which the verification process is partitioned by verification concerns. This important approach for managing verification complexity in billion-transistor SoCs makes the analysis and debug dimensions of the verification problem solvable. It narrows the verification scope to issues such as clock-domain verification, power, and DFT, in which static formal analysis plays a key role. It underlines the development of complete solutions and closure, rather than just nuts-and-bolts technology such as simulation and ABV. The keynote presentation explores numerous reasons why static formal analysis plays a major role in the new application-based verification paradigm.

Dr. Ashar, with two decades of experience in EDA, previously spent 13 years at NEC Labs (Princeton, NJ) developing formal verification technologies for VLSI design. He has authored approximately 70 papers with more than 1,000 citations, and co-authored a book, Sequential Logic Synthesis. He has 35 patents granted and pending, and has taught graduate and undergraduate courses on VLSI design automation, VLSI verification, and VLSI design as an adjunct faculty member at Columbia University. He holds a Ph.D. in EECS from UC Berkeley.

For a preview of his keynote presentation, see this brief video interview with Dr. Ashar.

When/Where

Conference: Monday, Oct. 21 - Wednesday, Oct. 23, 2013
Keynote: Wednesday, Oct. 23, 2013, 9 - 10:30 a.m., Columbia Falls Ballroom (2nd floor)
University Place Hotel & Conference Center
310 SW Lincoln St.
Portland, Ore. 97201
+1.866.845.4647

About FMCAD

FMCAD 2013 is the 13th in a series of conferences on the theory and application of formal methods in hardware and system design and verification.  FMCAD provides a leading international forum to researchers and practitioners in academia and industry for presenting and discussing groundbreaking methods, technologies, theoretical results, and tools for reasoning formally about computing systems. FMCAD covers formal aspects of computer-aided system design including verification, specification, synthesis, and testing. Real Intent is one of more than a dozen sponsors of this conference.

About Real Intent

Companies worldwide rely on Real Intent's EDA software to accelerate early functional verification and advanced sign-off of electronic designs. The company provides comprehensive CDC verification, advanced RTL analysis and sign-off solutions to eliminate complex failure modes of SoCs. Real Intent's Meridian and Ascent product families lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.

Acronyms
ABV: Assertion-Based Verification
CDC: Clock Domain Crossing
DFT: Design For Test
EDA: Electronic Design Automation
EECS: Electrical Engineering & Computer Science
RTL: Register Transfer Level
SoC: System-on-Chip

Meridian and Ascent are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.

Embedded Video Available: http://www.youtube.com/watch?v=u_8ItZOCgwE

Contact Information

  • Press contact:
    Sarah Miller for Real Intent
    ThinkBold Corporate Communications
    231.264.8636
    sarah@thinkbold.com