SOURCE: Real Intent

semiconductor, EDA, electronic design automation, clock domain crossing, CDC, ASIC, FPGA

October 19, 2010 16:21 ET

Real Intent CTO Pranav Ashar Addresses Multicore Design Verification Challenges at SoC Conference

IRVINE, CALIFORNIA--(Marketwire - October 19, 2010) -

Pranav Ashar, CTO of Real Intent, Inc., is among the panelists at the 8th International System-on-Chip (SoC) Conference. He will address SoC design verification challenges during the panel on Emerging Technologies, Trends, and Possibilities in Designing Multicore SoC Platforms.

11am-noon, Wednesday, Nov. 3, 2010
Hilton Irvine/Orange County Airport
18800 MacArthur Blvd.
Irvine, California, United States 92612
Tel: 1-949-833-9999

Information and Registration
To register for the International SoC Conference, please visit
To schedule a meeting with Real Intent, please email
For more information about Real Intent, please visit

About Real Intent's Software Products
Real Intent's automatic verification families include Ascent™ for early functional verification, Meridian™ for early Clock Domain Crossing (CDC) and Design for Test (DFT) verification, and PureTime™ for comprehensive constraints validation with glitch-aware exception verification.

About Real Intent
Real Intent is the innovator in automating the intelligence of formal techniques for design verification. This technology is used to solve critical problems encountered by design and verification teams worldwide. Real Intent's family of products dramatically improves the functional verification efficiency of leading edge ASIC and FPGA devices.
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Ascent, Meridian, and PureTime are trademarks of Real Intent, Inc.
All other trademarks and trade names are the property of their respective owners.

Contact Information

  • Press Contact:
    Georgia Marszalek
    Valley PR LLC for Real Intent