SOURCE: Real Intent

semiconductor, EDA, electronic design automation, clock domain crossing, CDC, ASIC, FPGA, linting

January 11, 2011 20:21 ET

Real Intent Demonstrates Software for Verification Signoff and CTO Pranav Ashar Presents on CDC and X Verification at EDSFair

YOKOHAMA, JAPAN--(Marketwire - January 11, 2011) -

Who/What:
At the Electronic Design and Solution Fair (EDSFair) in Yokohama, Japan, Real Intent Inc., the innovator in automating the intelligence of formal techniques for design verification, is demonstrating electronic design automation (EDA) software for verification signoff, including:

  • Ascent™ Lint -- high performance, low noise linting;
  • Ascent IIV -- early functional verification for implied design intent (Implied Intent Verification);
  • Ascent XV -- verification for X-related design bugs (X Verification);
  • Meridian™ CDC -- signoff quality Clock Domain Crossing (CDC) verification;
  • PureTime™ -- constraints validation with glitch-aware exception verification

Real Intent's CTO Pranav Ashar will also present on how to perform CDC and X verification effectively.

When:
Presentations:
What You Need to Know for Effective CDC Verification
Thursday, Jan. 27, 12:30-13:15
Efficient & Practical Prevention of X-Related Bugs
Friday, Jan. 28, 10:30-11:15

Product Demos:
Thursday, Jan. 27, 10:00 a.m. to 8:00 p.m.
Friday, Jan. 28, 10:00 a.m. to 6:00 p.m.
Booth 211

Where:
Pacifico Yokohama
1-1-1 Minato Mirai, Nishi-ku, Yokohama 220-0012, Japan

Information and Registration
For more information and to register for EDSFair, please visit http://www.edsfair.com or http://www.edsfair.com/e/.
To schedule a meeting or demonstration, please email sales@realintent.com or support-japan@realintent.com.
For more information about Real Intent and its verification products, please visit www.realintent.com.

About Real Intent
Real Intent is the innovator in automating the intelligence of formal techniques for electronic design verification signoff. Its software dramatically improves functional verification efficiency and design quality for ASICs and FPGAs devices and is used by design and verification teams worldwide. www.realintent.com

Notes to editors:
Ascent, Meridian and PureTime are trademarks of Real Intent, Inc.
All other trademarks and trade names are the property of their respective owners.

Contact Information

  • Press Contact
    Georgia Marszalek
    Valley PR LLC for Real Intent
    +1-650-345-7477
    Georgia@ValleyPR.com