SOURCE: Real Intent

EDA,ASIC,FPGA,DFT,semiconductor,CDC,functional verification,electronic design,47DAC, ATPG

May 19, 2010 17:23 ET

Real Intent Improves Electronic Design Quality, Introduces Design-For-Test (DFT) Software

Meridian DFT Indentifies Trouble Spots During RTL Creation

SAN JOSE, CA--(Marketwire - May 19, 2010) -  Real Intent  Inc., the innovator in automating the intelligence of formal techniques for design verification, announced today that it is introducing Meridian™ DFT, the newest member of its Meridian product family, to improve electronic design quality.

Meridian DFT identifies DFT trouble spots to allow designers to optimize testability during Register Transfer Level (RTL) creation, when the design impact is the greatest and the cost of modification is the lowest. It offers what-if analysis for DFT trade-offs and predicts Automatic Test Pattern Generation (ATPG) coverage of stuck-at and at-speed tests. Meridian DFT is designed to work with any ATPG or synthesis tool. It helps designers achieve high test quality and fault coverage at the RTL.

"Real Intent's strength is in providing surgical solutions for important design verification problems," commented Pranav Ashar, Chief Technology Officer of Real Intent. "We are introducing Meridian DFT to check the pre- and post-synthesis RTL for testability and DFT-related implementation errors. As with the other Real Intent tools, we fully expect that our recipe of marshaling formal methods, structural analysis and simulation will allow Meridian DFT to meet our customers' needs."

Real Intent will demonstrate Meridian DFT for the first time at the 2010 Design Automation Conference (DAC) in booth 722, in Anaheim, California.

Pricing and Availability
Meridian DFT will be available in Q3 2010. For pricing information, please email

About Real Intent's Automatic Verification Software
Real Intent's automatic verification solutions include Ascent™, the complete solution for early functional verification; Meridian, for early Clock Domain Crossing (CDC) and DFT verification; and PureTime™, the best-in-class, comprehensive constraints validation solution with glitch-aware exception verification.

About Real Intent
Real Intent is the innovator in automating the intelligence of formal techniques for design verification. This technology is being used to solve critical problems encountered by design and verification teams worldwide. Real Intent's family of products dramatically improves the functional verification efficiency of leading edge ASICs and FPGAs devices.

Real Intent is headquartered at 505 North Mathilda Avenue, Suite 210, Sunnyvale, CA 94085, phone: +1 (408) 830-0700 fax: +1 (408) 737-1962, Web:, e-mail:, Twitter: RealIntent.

Ascent, Meridian and PureTime are trademarks of Real Intent, Inc.

All other trademarks and trade names are the property of their respective owners.

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