SOURCE: Real Intent

January 19, 2007 20:33 ET

Real Intent Showcases Assertion-Based Verification Software at Events in California and Japan

EDS Fair, Thursday, January 25 and Friday, January 26, 2007, Pacifico Yokohama, Japan; DesignCon, Tuesday, January 30 and Wednesday, January 31, 2007, Santa Clara, California

SANTA CLARA, CA -- (MARKET WIRE) -- January 19, 2007 --


Who/What:

Real Intent, the leading supplier of formal verification software for electronic design, is attending conferences in Japan and California this month: Electronic Design and Solution (EDS) Fair in Yokohama, and DesignCon in Santa Clara. At the events, Real Intent will be demonstrating its EnVision™ software for formal verification.

The EnVision family includes: Conquest™ for verifying electronic designs using Property Specification Language (PSL) assertions, SystemVerilog Assertions (SVA), or Open Verification Library (OVL) checkers, using static formal verification; Ascent™ for automatic checking of Register Transfer Level (RTL) designs to verify logic and find bugs even before simulation; Clock Intent Verification™ for verifying the functionality of the user's cross domain clocking scheme; and PureTime™ for detecting timing exception errors throughout the entire design flow, with RTL or design netlists.

Where/When:

EDS Fair
10:00 a.m.- 6:00 p.m., Thursday, January 25 and Friday, January 26
Pacifico Yokohama, Yokohama, Japan
Booth #104 represented by ITOCHU Techno-Solutions Corporation
(http://www.ctc-g.co.jp/~EDA/edsf2007/index.html)

DesignCon
12:30 p.m.- 6:30 p.m., Tuesday, January 30, and Wednesday, January 31
Santa Clara Convention Center, Santa Clara, CA
Booth # 919

Information, Appointments and Registration Contacts:

For more information on DesignCon, please visit www.designcon.com.
For more information on EDS Fair, please visit www.edsfair.com.
For more information about Real Intent, please visit www.realintent.com.
To set an appointment with Real Intent, please contact:
rich@realintent.com.

About Real Intent

Real Intent extends breakthrough formal technology to critical problems encountered by design and verification teams worldwide. Real Intent's products dramatically improve the functional verification efficiency of leading edge application-specific integrated circuit (ASIC), system-on-chip (SOC), and Field Programmable Gate Array (FPGA) devices. Over 40 major electronics design houses, including Sun Microsystems, AMD, Marvell Technology Group, NVIDIA and NEC Electronics, use Real Intent software. For more information, visit www.realintent.com or e-mail info@realintent.com.

EnVision, Conquest, Ascent, PureTime, and Clock Intent Verification are trademarks of Real Intent, Inc. All other trademarks or registered trademarks are property of their respective owners.

Contact Information

  • Press contact:
    Georgia Marszalek
    Valley PR for Real Intent
    (650) 345-7477
    Email Contact