SOURCE: Real Intent

EDA,ASIC,FPGA,Clock Domain Crossing,semiconductor,CDC,functional verification,electronic design

March 04, 2010 12:58 ET

Real Intent Sponsors and Presents on "What Might Be Missing When Verifying FPGA Designs?" at the 2010 Virtual FPGA Summit

SUNNYVALE, CA--(Marketwire - March 4, 2010) -

Who/What:
At the 2010 Virtual FPGA Summit, Al Joseph, Sr. Application Consulting Engineer at Real Intent, Inc., the innovator in automating the intelligence of formal technologies for electronic design verification is presenting on the topic of "What might be missing when verifying FPGA designs?" at the Virtual FPGA Summit. Real Intent is also a sponsor of the 2010 event.

When/Where:
18 March 2010, 2:30 PM EDT (11:30 AM Pacific Time)

Information and Registration
For more information about Real Intent and its verification product families, please visit www.realintent.com. To schedule a meeting with Real Intent, please email sales@realintent.com.

For more information about the Virtual FPGA Summit, please visit http://www.fpgasummit.com.

To register for the event, please visit http://w.on24.com/r.htm?e=188571&s=1&k=0E1392B4B9126D554A7C62585B8EAD3B&partnerref=cc.

About Real Intent
Real Intent is the innovator in automating the intelligence of formal techniques for design verification. This technology is being used to solve critical problems encountered by electronic design and verification teams worldwide. Real Intent's family of products dramatically improves the functional verification efficiency of leading edge ASIC and FPGA devices.

Real Intent is headquartered at 505 North Mathilda Avenue, Suite 210, Sunnyvale, CA 94085, phone: +1 (408) 830-0700 fax: +1 (408) 737-1962, Web: www.realintent.com, e-mail: info@realintent.com, Twitter: www.twitter.com/RealIntent.

Ascent, Meridian, and PureTime are trademarks of Real Intent, Inc.
All other trademarks and trade names are the property of their respective owners.

Contact Information