SOURCE: Real Intent, Inc.

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September 12, 2013 08:00 ET

Real Intent Unveils New Release of Ascent Lint for Early Verification of Digital Designs

Significant Enhancements Improve QoR, Design Team Productivity

SUNNYVALE, CA--(Marketwired - September 12, 2013) - Real Intent, Inc., a leading provider of EDA software products, today announced significant enhancements for users in the new 2013 version of its Ascent Lint product, the industry's fastest and most accurate tool for early verification of digital designs. Ascent products find errors prior to Verilog or VHDL simulation, leading to improved quality of results (QoR) and higher design team productivity.

The new 2013 version of Ascent Lint delivers enhanced support for SystemVerilog, Verilog and VHDL languages, and improves ease of use in the GUI and low-noise reporting of design issues. A new integrated Emacs-mode feature enables users to view and manage all lint violations at each RTL source location for easier debugging. Users now can edit the source code, manage violations, and rerun Ascent Lint to view updated violations -- all from within the Emacs editor.

"Our new 2013 release addresses the needs of our customers who are developing next-generation complex designs that can exceed 500M logic gates in size," said Graham Bell, vice-president of Marketing at Real Intent. "It is a direct result of Real Intent experts working with industry leaders to define and implement next-generation rules -- something our customers have asked for. The enhancements we are introducing today demonstrate our commitment to support design engineering teams with the industry's best possible tools for early verification of digital designs."

Further notable enhancements and new features for Ascent Lint include:

  • 22 new lint rules that ensure design code quality and consistency for a wide range of potential issues
  • A new CDC Readiness policy to ensure that the design is ready for Clock Domain Crossing analysis
  • Extension of regular expression syntax to be Perl-compatible for more flexible processing
  • Enhanced RTL analysis, processing and selection of source and library files
  • Comparison of separate analysis reports to expose differences and changes

For more information about the new enhancements for Ascent Lint 2013, please click here to see a short (3 minute) video by Shiva Borzin, Technical Marketing Manager at Real Intent.

Availability

The new release of Ascent Lint is available immediately for download from the Real Intent web-site. 

About Real Intent
Companies worldwide rely on Real Intent's EDA software to accelerate early functional verification and advanced sign-off of electronic designs. The company provides comprehensive CDC verification, advanced RTL analysis and sign-off solutions to eliminate complex failure modes of SoCs. Real Intent's Meridian and Ascent product families lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.

Acronyms
CDC: Clock Domain Crossing
EDA: Electronic Design Automation
GUI: Graphical User Interface
RTL: Register Transfer Level
SoC: Systems-on-Chip
VHDL: Very High-level Design Language

Ascent and Meridian are trademarks of Real Intent, Inc.
All other trademarks and trade names are the property of their respective owners.

Embedded Video Available: http://www.youtube.com/watch?v=gsmlN6FAjL0

Contact Information

  • Press contact:
    Sarah Miller for Real Intent
    ThinkBold Corporate Communications
    231-264-8636
    sarah@thinkbold.com