SOURCE: ProPlus Design Solutions

October 03, 2012 11:00 ET

REMINDER: Media Alert: IBM, ProPlus Design Solutions to Host Webinar on Advanced Yield Analysis, Optimization

October 4 Tutorial Will Offer Ways to Make Statistical Yield Analysis More Practical, Reliable, Faster

SAN JOSE, CA--(Marketwire - Oct 3, 2012) -

WHO: IBM and ProPlus Design Solutions, provider of unique Design for Yield (DFY) solutions that integrate device modeling, parallel SPICE simulation and statistical analysis

WHAT: Will host a 60-minute Webinar titled, "Advanced Yield Analysis and Optimization with 3-6 Sigma Statistical Simulations for Memory, Logic, Digital and Analog Designs." Presenters Dr. Rajiv V. Joshi, research staff member, T. J. Watson Research Center, IBM, and Dr. Bruce McGaughy, ProPlus Design Solutions' chief technology officer and senior vice president of Engineering, will offer a look at more practical, reliable and faster statistical yield analysis. They will demonstrate how this is done through the use of foundry SPICE models, integrated statistical SPICE engine and hardware-validated statistical sampling technologies.

WHEN: Thursday, October 4, at 11 a.m. P.D.T./2 p.m. E.D.T.

WHERE: EE Times Webinar http://seminar2.techonline.com/registration/distrib.cgi?s=1938&d=4066

WEBINAR REGISTRATION: http://seminar2.techonline.com/registration/distrib.cgi?s=1938&d=4065
The online tutorial is meant for engineers and managers who want to make better use of foundry variation models and are looking for better statistical yield analysis with Monte Carlo simulations for analog designs.

About ProPlus Design Solutions
ProPlus Design Solutions, Inc. delivers Electronic Design Automation (EDA) solutions that enhance the link between design and manufacturing. It provides unique Design for Yield (DFY) solutions that integrate device modeling software, a parallel SPICE engine and statistical analysis algorithms. Products include: BSIMProPlus™, a leading device modeling technology platform for nanometer device fabrication, NanoSpice™, a full-chip parallel SPICE simulator with full-chip capacity and SPICE accuracy for transistor-level statistical simulation and analysis, and NanoYield™, a DFY platform to meet performance and yield optimization challenges of advanced memory, analog and digital circuit designs. ProPlus Design Solutions has R&D centers in the San Jose, Calif., Beijing and Jinan, China, and offices in Tokyo, Japan, Hsinchu, Taiwan, and Shanghai, China. More information about ProPlus Design Solutions can be found at www.proplussolution.com.

BSIMProPlus, NanoSpice and NanoYield are registered trademarks of ProPlus Design Solutions. ProPlus Design Solutions acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

Contact Information

  • For more information, contact:
    Nanette Collins
    Public Relations for ProPlus Design Solutions
    (617) 437-1822
    Email Contact