SOURCE: Antares Advanced Test Technologies

September 04, 2007 16:20 ET

Semiconductor Test Engineers Review Use of Small-Pitch Spring Pins in WLCSP Sockets and On-Wafer Probing Solutions During KGD Workshop Presentation by Antares Advanced Test Technologies

Antares' CTO Co-Authored Spring-Pin Paper

SANTA CLARA, CA and VANCOUVER, WA--(Marketwire - September 4, 2007) - Antares Advanced Test Technologies, a global supplier of integrated semiconductor test consumables focused on maximizing chipmakers' production yields, will have a paper -- co-authored by its CTO, Dr. James Forster, Ph.D., and titled "WLCSP and On-wafer Probing Test Solutions Using Small-pitch Spring Pins" -- presented at the 2007 KGD Packaging & Test Workshop at the Embassy Suites Napa Valley next Tuesday, Sept. 11th at 11 a.m. PT.

The presentation will be given by the paper's co-author, James Zhou, an Antares senior staff engineer, and generally detail how a 0.25/0.3mm pitch spring pin was used in a WLCSP test socket for the testing of wireless devices up to 5GHz. Zhou will address how a high frequency fanout interposer was designed to connect a 0.25mm-pitch device to a loadboard to solve the interface challenges of small-pitch devices to larger-pitch loadboards.

Zhou's presentation will highlight how the interface solution eliminates the need for building small-pitch loadboards -- which often have reliability issues and can be cost prohibitive -- and allows 3D EM simulations to be performed on the entire test stack to ensure good RF performance.

"The demand for new, affordable test solutions for production testing of known good die applications has really grown in recent years with the proliferation of wireless devices and wafer-level CSP," Forster said. "Yet spring-pin solutions -- with their relative ease of deployment and low total cost of ownership -- continue to be entirely effective in testing KGD applications."

Zhou's presentation is open to all KGD workshop attendees. Antares' paper was also co-authored by Dr. Hongjun Yao, Ph.D., signal integrity department manager.

The 2007 KGD Packaging & Test Workshop, which runs from Sept. 9-12 in Napa, Calif., brings together international technical experts, managers and business development professionals to discuss the latest developments in the die products industry.

For more information on the workshop, visit

About Antares Advanced Test Technologies

Antares Advanced Test Technologies is reducing the cost of semiconductor test by concentrating on high-sensitivity areas such as yield and the integration of test disciplines, focusing on customer support, delivering innovative technologies and offering a single point of contact for semiconductor test cell requirements, including burn-in sockets, test sockets, ATE consumables and thermal management solutions. Antares is headquartered in Vancouver, Wash. and has design, development and manufacturing locations in Suzhou, China; Yokohama, Japan; Phoenix and Gilbert, Ariz.; Milpitas and Santa Clara, Calif.; and Aman, Jordan.

Contact Information