SOURCE: Silicon Frontline Technology

post-layout verification,power devices,EDA,semiconductor,electronic design, parasitic extraction

March 04, 2010 09:00 ET

Silicon Frontline Presents Tutorial on Field Solvers and Parasitic Extraction for Analog and Digital Designs, Demos Newest 3D Extraction and Post-Layout Verification Software at ISQED

Products Stand Out for Semiconductor Power Device and A/MS Design

SAN JOSE, CA--(Marketwire - March 4, 2010) -

Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company in the post-layout verification will exhibit and present a tutorial on Field Solvers for Advanced Analog and Digital Designs at the International Symposium on Quality Electronic Design (ISQED).

Field Solvers and Parasitic Extraction for Advanced Analog and Digital Designs
Dr. Maxim Ershov, Chief Scientist at Silicon Frontline, was formerly a professor at the University of Aizu, Japan and Georgia State University. He has over 100 publications in refereed journals and conferences.
The tutorial covers challenges and solutions of RC extraction for advanced high-speed digital and precision analog circuits. A need for accurate, reliable, and efficient capacitance extraction will be illustrated using examples, where 3D metal shapes, complicated BEOL (Back End Of Line) stack, and various manufacturing and other effects dominate design parasitics. A comparison of various extraction tools including pattern-matching extractors, and mesh-based and mesh-less field solvers is included.

Silicon Frontline's products, F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D extraction and analysis of large resistive power devices, provide nanometer and Analog Mixed Signal (A/MS) design accuracy and improve the reliability and efficiency of semiconductor devices.

F3D is ideally suited for sensitive analog and A/MS circuits where coupling is a challenge -- ADCs, DACs, circuits with differential signals, MIM/MOMCaps and 3D devices, image sensors, RF and high speed designs and for circuits manufactured at advanced technology nodes, such as 65, 40 and 32nm as well as for 90nm to 350nm nodes. R3D target applications include discrete or embedded power devices, where efficiency and reliability are important, as well as designs requiring analysis of large metal interconnects.

1:30-3:30pm, Tuesday, March 23, 2010
Room: Santa Clara
1-6 pm, Tuesday, March 23, 2010

DoubleTree Hotel
San Jose, California

For More Information and to Register
For more information about Silicon Frontline, please visit
For more information about ISQED, please visit
To register for ISQED, please visit

About Silicon Frontline
Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company's software products improve silicon quality for standard and advanced nanometer processes. To date, Silicon Frontline customers are among the top 20 semiconductor companies, and the company's technology has been endorsed by a number of the leading foundries.
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Notes to editors:  
Acronyms and Definitions  
3D: 3 Dimensional
ADC: Analog to Digital Converter
A/MS: Analog Mixed Signal
CAD: Computer-Aided Design
CMP: Chemical Mechanical Polishing
DAC: Digital to Analog Converter
EDA: Electronic Design Automation
MOMCap: Metal-Oxide-Metal capacitor
MIMCap: Metal-Insulator-Metal capacitor
Power Device: Power devices are semiconductor devices used as switches or rectifiers in circuits for electronic circuits.
SOC: System on Chip
TCAD: Technology Computer-Aided Design

All trademarks and tradenames are the property of their respective holders.

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