July 01, 2013 17:00 ET

STATS ChipPAC Celebrates 1,000th U.S. Patent Milestone

Commitment to Innovation and Strong Focus on Advanced Wafer Level Technology Deliver Broad Portfolio of Intellectual Property

SINGAPORE -- 02 JULY 2013, UNITED STATES--(Marketwired - Jul 1, 2013) - STATS ChipPAC Ltd. ("STATS ChipPAC" or the "Company") (SGX-ST: STATSChP) (SGX: S24), a leading provider of advanced semiconductor packaging and test services, today announced that it has been granted its 1,000th patent by the U.S. Patent and Trademark Office (USPTO).

Since the inception of its Intellectual Property (IP) program in 2000, STATS ChipPAC has filed more than 1,500 patents and published patent applications with the USPTO and more than 900 patents and applications in other countries, of which more than 200 have been registered or allowed as patents in Singapore, South Korea, Taiwan and other countries. This is at least 400 more U.S. patents and applications than other companies in the global Outsourced Semiconductor Assembly and Test (OSAT) industry. STATS ChipPAC has concentrated its IP development on advanced or future technologies such as wafer level packaging, Post Wafer fab Processing (PWfP) or mid-end processing, Through Silicon Via (TSV), flip chip interconnect, integrated passive devices (IPD) and 2.5D/3D package integration. With this strategic focus, STATS ChipPAC has built up a patent portfolio in which advanced or future technologies comprise 60% of its IP.

STATS ChipPAC's patent portfolio has been recognized for its quality, strength and overall importance to the semiconductor manufacturing industry by The Institute of Electrical and Electronics Engineers (IEEE), the world's largest professional association for the advancement of technology. IEEE ranked STATS ChipPAC among the top 10 semiconductor manufacturing companies in the world for the last two consecutive years based on the strength of its IP and technology innovations. 

"Our 1,000th U.S. patent is a milestone achievement for STATS ChipPAC. Over the last 5 to 10 years, we have demonstrated our commitment to technology innovation and built a high-quality, innovative IP portfolio. In 2011, we became the leading patent holder among our competitors worldwide in terms of the number of U.S. patents granted and have continued to develop advanced technology and process improvements that will drive evolutionary packaging for our customers," said Dr. Han Byung Joon, Executive Vice President and Chief Technology Officer, STATS ChipPAC.

STATS ChipPAC's 1,000th U.S. patent is a strong representation of the priority the Company has placed on the development of advanced wafer level technology. U.S. Patent No. 8,456,002, "Semiconductor Device and Method of Forming Insulating Layer Disposed Over the Semiconductor Die for Stress Relief", relates to innovations in the assembly of embedded Wafer Level Ball Grid Array (eWLB) devices in which an insulating layer provides stress relief during the formation of an interconnect structure in the device. This is part of a family of patents that includes five previously granted U.S. patents for eWLB and Wafer Level Chip Scale Packaging (WLCSP) inventions. 

Dr. Han continued, "This milestone patent is further recognition not only of our rapidly evolving wafer level technologies, but also of our dedication and leadership in developing innovative technologies that provide solutions for the challenges confronting semiconductor packaging today."

Forward-Looking Statements
Certain statements in this release are forward-looking statements that involve a number of risks and uncertainties that could cause actual results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilisation; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; shortages in supply of key components and disruption in supply chain; the amount of the business interruption insurance claim due to flooding of the Thailand Plant; loss of key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or cancelling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; classification of our Company as a passive foreign investment company; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; majority ownership by Temasek Holdings (Private) Limited ("Temasek") that may result in conflicting interests with Temasek and our affiliates; unsuccessful acquisitions and investments in other companies and businesses; labour union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; the continued trading and listing of our ordinary shares on the Singapore Exchange Securities Trading Limited ("SGX-ST"). You should not unduly rely on such statements. We do not intend, and do not assume any obligation, to update any forward-looking statements to reflect subsequent events or circumstances.

About STATS ChipPAC Ltd.
STATS ChipPAC Ltd. (SGX-ST Code: S24) is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices throughout Asia, the United States and Europe. STATS ChipPAC is listed on the SGX-ST. Further information is available at Information contained in this website does not constitute a part of this release.

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