SOURCE: STATS ChipPAC

STATS ChipPAC

October 05, 2011 09:30 ET

STATS ChipPAC's Next-Generation Fan-Out Wafer Level Technology Platform Scales Packaging Solutions for Broader Range of Advanced Applications

Increased Power and Performance in a Small, Thin Form Factor Support Converging Markets

SINGAPORE--05/10/2011, UNITED STATES--(Marketwire - Oct 5, 2011) - STATS ChipPAC Ltd. ("STATS ChipPAC" or the "Company") (SGX-ST: STATSChP), a leading semiconductor test and advanced packaging service provider, today announced that its next-generation fan-out wafer level packaging (FO-WLP) offers the technology to support a broad range of semiconductor markets including smartphones, media tablets and cloud computing applications.

Rapid technology convergence driven by the growth of mobile and internet-enabled devices and emergence of small application programs is fostering a new generation of multi-functional highly innovative end user devices that can handle data, voice, video and media for convenience, mobile entertainment and a richer overall user experience at unprecedented levels. The telecommunications, information technology, consumer electronics and media sectors are looking for ways to differentiate products and solutions by integrating more advanced features, processing capabilities and enhanced user interfaces into electronic devices and their applications. The anticipated growth of the converging markets has intensified the drive for innovative product solutions and increasingly requires a new class of semiconductor packages with the attributes necessary to meet this broad set of performance needs.

One of the key technologies in STATS ChipPAC's FO-WLP technology platform is embedded Wafer Level Ball Grid Array (eWLB). With its high-performance and power-efficient capabilities in an inherently small, ultra-thin package profile, eWLB has gathered momentum as a technology enabler for semiconductor companies in the smartphone market. STATS ChipPAC has shipped over 150 million eWLB units at an increasing rate into this market segment which has seen continuous strong growth.

"Electronic product differentiation drives the need to integrate more functionality, achieve faster performance and increase computing power; all in a smaller end product. With the convergence of computing functionality and high speed communication, semiconductor companies need to provide new product features and ramp to volume production more quickly to satisfy the compressed development and product life cycles," said Hal Lasky, Executive Vice President and Chief Sales Officer, STATS ChipPAC. "eWLB has gained considerable success as the preferred advanced package solution in the smartphone market and is poised to be a strong solution in the converging markets."

STATS ChipPAC is leading the development of next-generation eWLB by introducing a number of advanced architectures including small die, large die, multi-die, multi-layer and stacked Package-on-Package (PoP). STATS ChipPAC is incorporating Through Silicon Via (TSV) and Integrated Passive Devices (IPD) technologies with eWLB in advanced 2.5D and 3D designs to effectively address heterogeneous technology integration where mixed die sizes and silicon lithography nodes are combined into thin package profiles to meet enhanced flexibility, functionality and form factor objectives.

"Going forward, the convergence of telecommunications, information technology, consumer electronics and media solutions are driving the refinement, boundaries and integration of high performance, high bandwidth functionality in very thin semiconductor packages. eWLB technology scales packaging solutions to provide our customers with increased integration of multiple functions such as baseband processors, RF transceivers, power management components and application processors for improved system performance in thinner and smaller package dimensions," said Dr. Han Byung Joon, Executive Vice President and Chief Technology Officer, STATS ChipPAC. "Our innovative package designs combining eWLB, TSV and IPD technologies position us to provide increased performance at lower costs at the component and system levels, thereby enabling our customers to compete more effectively in meeting the needs of the converging digital products."

STATS ChipPAC will be presenting the latest information on eWLB and fan-out wafer level technology at the International Wafer Level Packaging Conference that is being held October 3rd - 6th, 2011 in Santa Clara, California.

Forward-Looking Statements
Certain statements in this release are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, shortages in supply of key components and disruption in supply chain; general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilisation; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; loss of key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or cancelling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; classification of our Company as a passive foreign investment company; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; majority ownership by Temasek Holdings (Private) Limited ("Temasek") that may result in conflicting interests with Temasek and our affiliates; unsuccessful acquisitions and investments in other companies and businesses; labour union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; the continued trading and listing of our ordinary shares on the Singapore Exchange Securities Trading Limited ("SGX-ST"). You should not unduly rely on such statements. We do not intend, and do not assume any obligation, to update any forward-looking statements to reflect subsequent events or circumstances.

About STATS ChipPAC Ltd.
STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.

Contact Information

  • Investor Relations Contact:
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