SOURCE: Tensilica

Tensilica

November 30, 2010 08:03 ET

Tensilica CTO Chris Rowen Speaker and Panelist at SDR'10

Will Discuss Tensilica's Role in Multi-Standard Wireless Baseband Processing

SANTA CLARA, CA--(Marketwire - November 30, 2010) - Chris Rowen, Tensilica founder and chief technology officer, has been invited to present "Extensible Baseband DSPs, Tools and Multi-Core Architectures for Low-Power 4G SDR Silicon Platforms" at the upcoming SDR'10 event in Washington, D.C. SDR'10 focuses on reconfigurable radio technologies and Rowen's presentation will highlight Tensilica's second generation processor-based, multi-standard handset baseband reference architecture.

In addition, Rowen will participate in a panel discussion on "Comparing FPGA + C compilers with Multi-core Technology." This panel will look at the costs, programmability, performance, power, and time-to-market of multiprocessor designs versus FPGAs to see who will ultimately dominate future SDR platforms.

What/When: 
"Extensible Baseband DSPs, Tools and Multi-Core Architectures for Low-Power 4G SDR Silicon Platforms"
Thursday, Dec. 2 at 3:25 p.m., Section 6A, Applications

"Comparing FPGA + C Compilers with Multi-core Technology"
Thursday, Dec. 2 at 5:10 p.m., Panel Session

Where: 
SDR'10 will be held at the Hyatt Regency Crystal City in Washington, D.C. For more information, visit http://conference.wirelessinnovation.org

About Chris Rowen, Ph.D.
Chris Rowen is founder, chief technology officer, member of the board of directors, and Tensilica's first president. He was a pioneer in the development of RISC architecture at Stanford in the early '80s and helped start MIPS Computer Systems, Inc. in 1984, where he served as vice president for Microprocessor Development. Most recently, Rowen was vice president and general manager of the Design Reuse Group of Synopsys, Inc. He received a B.A. in physics from Harvard University and M.S. and Ph.D. in electrical engineering from Stanford University.

About Tensilica
Tensilica, Inc. is the leader in customizable dataplane processor IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10 to 100x the performance because they can be customized using Tensilica's automated design tools to meet specific signal processing performance targets. Tensilica's DPUs power SOC designs at system OEMs and six out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes, digital still cameras and portable media players), computers, and storage, networking and communications equipment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.

Contact Information

  • Contact:
    Erika Powelson
    Powelson Communications for Tensilica
    831-424-1811
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