SOURCE: Tensilica

Tensilica

August 17, 2011 08:00 ET

Tensilica CTO and Founder Chris Rowen Presents on the World's Fastest DSP Core at HOT CHIPS 23

SANTA CLARA, CA--(Marketwire - Aug 17, 2011) - Chris Rowen, CTO and founder of Tensilica, will present, "The World's Fastest DSP Core: Breaking 100 GMAC/s Barrier," at the HOT CHIPS 23 symposium in Stanford, CA, on August 18. Dr. Rowen will discuss the accelerated transition to 4G wireless connectivity through LTE and LTE-Advanced that mandates a more programmable baseband architecture. He will disclose the rationale, machine organization, and instruction set of the Tensilica ConnX BBE64 family, a high-performance SIMD/VLIW digital signal processor built for 4G cellular systems.

What and When:
"The World's Fastest DSP Core: Breaking 100 GMAC/s Barrier"
Thursday, August 18
4:15 p.m. - 5:15 p.m. PT

Where:
Stanford Memorial Auditorium, Stanford University
Stanford, CA

About Chris Rowen
Chris Rowen is founder, chief technology officer, member of the board of directors, and Tensilica's first president. He was a pioneer in the development of RISC architecture at Stanford in the early 1980s and helped start MIPS Computer Systems, Inc. in 1984, where he served as vice president for microprocessor development. Most recently, he was vice president and general manager of the Design Reuse Group of Synopsys, Inc. He received a B.A. in physics from Harvard University and a M.S. and Ph.D. in electrical engineering from Stanford University.

About HOT CHIPS 23
Since it started in 1989, HOT CHIPS has been known as one of the semiconductor industry's leading conferences on high-performance microprocessors and related integrated circuits. The three days of the conference typically feature two tutorials, two keynotes, a panel discussion and around 25 presentations on a variety of subjects related to microprocessors and integrated circuits. The conference emphasis is on real products and realizable technology.

About Tensilica
Tensilica, Inc. is the leader in customizable dataplane processor IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of DSP and CPU while delivering 10 to100x the performance because they can be optimized using Tensilica's automated design tools to meet specific signal processing performance targets. Tensilica's DPUs power SOC designs at system OEMs and six out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes, digital still cameras and portable media players), computers, and storage, networking, wireless base station and communications equipment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.

Contact Information

  • Contact:
    Erika Powelson
    Powelson Communications for Tensilica
    831-424-1811
    Email Contact