SOURCE: Tilera Corporation

Tilera Corporation

February 24, 2014 06:00 ET

Tilera Launches World's Most Efficient, Highest Performance SSL/TLS Security Solution on a Single Chip

Scalable From 10Gbps to 120Gbps of SSL Throughput and 10,000 to Over 140,000 Secure Connections-per-Second Across Tilera's Product Line Coupled With INSIDE Secure's MatrixSSL Toolkit

SAN FRANCISCO, CA--(Marketwired - Feb 24, 2014) - (RSA 2014, Booth #2320) -- Tilera® Corporation, the leader in high-performance, power-efficient computing, today announced the availability of a fully integrated secure sockets layer/transport layer security (SSL/TLS) security stack powered by INSIDE Secure's (INSD) industry-proven MatrixSSL™ toolkit and tuned to run seamlessly on the entire family of TILE-Gx™ processors. With the power-efficiency of the TILE-Gx processors, no other SSL/TLS solution on the market can deliver the security performance of this offering at less than 30 Watts of power.

As data security breaches are becoming ever more prevalent, public cloud providers as well as enterprises are deploying SSL/TLS security for a large percentage of their traffic. Coupled with the exponential increase in network traffic, securing network data without degrading throughput and response times now requires accelerated and tuned solutions, exemplified by Tilera's offering.

Through this integrated solution, only a fraction of the TILE-Gx cores are consumed, freeing the remainder for developers to build advanced networking functions such as deep packet inspection (DPI), intrusion detection and prevention (IDS/IPS), and virtual switching. For example, while performing 35Gbps of SSL processing, over 75 percent of the TILE-Gx72™ CPU cores are free for other applications. Whereas other processors on the market exhaust their entire computing power to deliver significantly less throughput.

The MatrixSSL security stack is available for deployment on the TILE-Gx processor family as well as Tilera's hardware platforms, including the TILEncore-Gx™ PCIe-based Intelligent Application Adapters. All of Tilera's devices are supported by the Multicore Development Environment™ (MDE) software tool suite with a standards-based Linux and C/C++ programming environment.

"Our MatrixSSL software toolkit continues to lead the industry with the smallest memory footprint and support for all common protocol modes," said Dr. Simon Blake-Wilson, executive vice president, INSIDE Secure. "The combination of our efficient MatrixSSL toolkit, together with Tilera's best-in-class multicore processors with hardware crypto acceleration results in a level of performance, efficiency and scalability not seen before in the market."

Key features of the Tilera SSL solution toolkit include:

  • Interoperable with SSL 3.0, TLS 1.0, 1.1, 1.2 and DTLS
  • Supports a broad range of cipher-suites, including the US Government 'Suite B' profile for TLS
  • Carrier-grade SSL/TLS stack, supporting over 2 million simultaneous connections
  • Configurable for either server-side or client-side operation
  • Support for IPv4 and IPv6 in control and data planes
  • Integrated high throughput TCP/IP stack running in 'user-space'
  • High-performance SSL/TLS handshaking with hardware acceleration for public key operations
  • Broad authentication method support (PSKs, PKI, EAP, XAUTH, Radius, etc.), including PKCS #11
  • Delivered in ANSI C source code. Very low runtime memory footprint

"We are seeing increasing demand from our customers for high-performance SSL processing," said Bob Doud, director of marketing, Tilera Corporation. "The amount of SSL-protected traffic is exploding, and this presents a huge problem to network monitoring and analysis systems, as well as intrusion detection equipment, since they cannot inspect the encrypted payloads. With the ability to support line-rate SSL termination Tilera can solve those problems and preserve the performance and security of the network."

Tilera has previously announced record-breaking IPsec processing with INSIDE Secure's QuickSec™ software running on the TILE-Gx36™ processor. With only eightcores active, over 37Gbps of IPsec ESP throughput was demonstrated, leaving approximately 80 percent of the processor resources free for other application workloads.

Tilera will demonstrate these new SSL security capabilities at RSA 2014 in San Francisco at the Moscone Convention Center, February 24-27, 2014 in the South Expo booth #2320.

About Tilera:
Tilera® Corporation is the developer of the highest performance, low-power, general purpose manycore processors. Tilera is headquartered in San Jose, Calif., with additional locations worldwide. For more information, visit or follow us on Twitter @Tilera.

Contact Information

  • Media Contact:
    Devan Gillick
    Breakaway Communications for Tilera Corporation
    Mobile: 530-591-3194
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